Job Description

Design Verification Manager:

Public Client.

Full-Time- Direct Hire-

San Jose Or Austin.

Hybrid.

ASIC Verification Manager/Lead to lead the verification efforts for SoC multi core advanced CPUs based designs.

Possess A strong background in RTL verification methodologies,

UVM, C and SystemVerilog, along with proven leadership skills in managing and technically guiding verification teams.

Driving pre-silicon verification, collaborating with cross-functional teams, validation of SoCs.

• Lead and manage the ASIC verification team to ensure high-quality verification of SoC Advance CPU based SoC designs.
• Define and implement verification strategies, test plans, and methodologies, release flows for complex IP and SoC design.
• Develop and maintain UVM-based and C-based testbenches, including constrained random testing, functional coverage, and assertions.
• Drive pre-silicon verification and support emulation, and FPGA prototyping.
• Collaborate closely with design, architecture, software, and post-silicon validation teams to ensure comprehensive verification coverage.
• Analyze and debug simulation failures, regressions, and coverage gaps to ensure complete verification closure.

• 15+ years of experience in ASIC/SoC verification, with at least 3+ years in a managerial and leadership role.
• Expertise in ARM architecture, AMBA protocols (AXI, AHB, APB), and memory subsystems, PCIe, D2D Technologies.
• Strong UVM, SystemVerilog, and functional verification methodologies.
• Experience with Excelium, VCS, Questa, or other industry-standard simulators.
• Formal Verification, Gate level Simulations, Static Timing Analysis, and UPF based Power-aware Verification.
• Hands-on experience in C/C++, Python, or Perl scripting for automation.
• Experience with Emulation, FPGA prototyping, and hardware-software co-verification is a nice to have.

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